Intel Is in Talks to Be an Anchor Investor in Chip Designer Arm’s IPO

(Bloomberg) -- Arm Ltd., the chip designer backed by SoftBank Group Corp., is in talks with potential strategic investors including Intel Corp. to anchor what will be one of the largest initial public offerings of the year, people familiar with the matter said. 

CONSTELLATION BRANDS, INC.

UK-based Arm has held talks with other companies about participating in the IPO, according to the people, who asked not to be identified discussing confidential information. 

Talks are in the early stages and could still fall apart ahead of the listing, they said. It’s also unclear how much would be invested in Arm, or what the structure would be. Representatives for Intel and Arm declined to comment.

Shares in SoftBank rose as much as 7.7% in Tokyo on Tuesday. Intel shares were up less than 1% Tuesday morning in New York.

Bloomberg is looking for the UK’s most innovative startups. Tell us about one here.

Arm is looking to raise as much as $10 billion in a New York listing later this year, having rejected repeated appeals from UK prime ministers to tempt the home-grown technology giant back to London, where it once traded. The lure of higher tech valuations and a deeper investor base in the US ultimately won out for Arm, which is expected to list on the Nasdaq exchange.

Bringing on an anchor investor can help drum up interest and momentum in an IPO, especially in a rough market for new listings. If the talks succeed, Intel would eventually be listed in Arm’s IPO prospectus ahead of the listing.

Anchor investors buying $100 million to $200 million worth of shares have been popular for semiconductor-related IPOs in recent years. Growth equity firm General Atlantic invested about $100 million in Intel-backed Mobileye Global Inc.’s IPO last year while Qualcomm Inc. backed GlobalFoundries Inc.’s listing in 2021.

A key part of Intel Chief Executive Officer Pat Gelsinger’s push to return the company to the pinnacle of the semiconductor industry is a plan to open up its factories to other firms, even rivals. If he’s to be successful in competing with Taiwan Semiconductor Manufacturing Co. in outsourced production, Intel will have to produce chips that contain Arm’s widely-used technology.

The two have already announced a technical tie-up. Arm’s designs and industry-standard instruction set are used in everything from Broadcom Inc. networking chips to Apple Inc. processors in the iPhone and Macs to Qualcomm Inc.’s ubiquitous chips for mobile phones.

By taking a position in Arm, whose technology has enabled direct competition for Intel’s processors, Gelsinger may be seeking to show his commitment to Arm and to embracing that openness. Throughout its more than 50-year history, Intel’s plants have almost exclusively worked on its own designs.

“Intel’s talks to become a potential strategic investor in ARM’s upcoming IPO underlines the chip giant’s goal of becoming a key foundry for the fabless semiconductor sector and bringing back leading-edge manufacturing to the US,” said Bloomberg Intelligence analyst Kunjan Sobhani. “This is despite direct rivalry between Intel chips and ARM-based processors. It follows an Intel-ARM technical tie-up in April which, if combined with a strategic stake, could position Intel as a maker of chips designed on ARM architecture.”

Gelsinger has launched an ambitious plan to regain Intel’s lead in the semiconductor industry by building new plants and rapidly improving its manufacturing technology. It’s an uphill battle as the main market for Intel’s products — personal computer processors — has slumped. And the company is losing market share to Nvidia Corp., which has leveraged its prowess in graphics processors used in video games to become the leader for artificial intelligence chips. Nvidia, which became the first chipmaker to cross the $1 trillion mark in valuation, first eclipsed Intel in market capitalization in 2020, and now the two companies aren’t even close. 

SoftBank founder Masayoshi Son has said he hopes the Arm IPO can be the largest ever by a chip company. Arm’s valuation still hasn’t been set and the company could be valued anywhere from $30 billion to $70 billion, Bloomberg News previously reported. 

Arm is a jewel of the UK technology industry. Its tech is found in most of the world’s smartphones and is pervasive across the electronics industry. The company is keeping its headquarters in Cambridge, England, for the time being and hasn’t ruled out the potential for a secondary listing in London down the road.

(Updates Intel shares and adds analyst comment.)

Most Read from Bloomberg

©2023 Bloomberg L.P.

Intel Shows New Stacked CFET Transistor Design At ITF World

At ITF World 2023 in Antwerp, Beligum, Ann Kelleher, Intel’s Technology Development GM, presented an outline of Intel’s latest developments in several key areas, and one of the most interesting revelations was that Intel would embrace stacked CFET transistors in the future. This marks the first time that Intel has shown this new type of transistor in its presentations, but Kelleher didn’t provide a date or firm timeline for production.

Here we can see a zoomed-in version of the slide with a ring added around the new type of transistor. The first two transistor types at the bottom of the slide are older variants, while the ‘2024’ entry represents Intel’s new RibbonFET transistors that we’ve covered extensively in the past. Intel's first-gen design with the 'Intel 20A' process node features four stacked nanosheets, each surrounded entirely by a gate. Kelleher says this design remains on track to debut in 2024. RibbonFET uses a gate-all-around (GAA) design, which confers both transistor density and performance improvements like faster transistor switching while using the same drive current as multiple fins, but in a smaller area.

Kelleher’s slide also shows the next generation of Intel’s GAA design – the stacked CFET. The Complementary FET (CFET) transistor design has been on imec’s roadmaps for some time, but we haven’t yet seen it on an Intel slide or heard the company state that it plans to adopt this design. As a reminder, the imec research institute studies future technologies and collaborates with the industry to bring them to fruition. 

Naturally, there is some variation between Intel’s stylized render and the imec CFET render we’ve included in the first image of the album above, but Intel’s image conveys the point well – this design allows the company to stack eight nanosheets, a doubling of the four used with RibbonFET, thus increasing transistor density. We also have images of the three other types of Intel transistors in the album above — Planar FET, FinFET, and RibbonFET.

CFET transistors, which you can read more about here, stack n- and pMOS devices atop each other to enable higher density. Two types of CFETs are currently being researched — monolithic and sequential. The four devices on the right side of the above image detail various proposed CFET designs. For now, it is unclear which type of design Intel would adopt, or if it will devise another type of implementation. Given that imec doesn’t have CFETs on its roadmap until around when chips shrink to 5 angstroms in the 2032 timeframe, it could be some time before we find out.

That said, it isn’t guaranteed that Intel would target CFET in that timeframe: Interestingly, Intel’s slide shows its next-gen GAA nanosheet transistor (RibbonFET) and then jumps directly to CFET, omitting the GAA forksheet transistors that most think will be the step between nanosheet and CFET. You can also see that type of transistor in the above slide — it is the second from the left.

Given that Intel’s image isn’t very detailed, it is possible that the company also plans to use forksheet transistors before it moves to CFET, but it hasn’t chosen to share the details yet. We’re following up with Intel to see if we can learn any more details.

Here are the remainder of the slides from Kelleher’s presentation for your perusal. Kelleher covered a diverse range of topics, including the decline in the cost paid per transistor over time, the increase in the reliability of transistors over time, the increasingly complex packaging process, and the importance of a shift to the System Technology Co-Optimization methodology for Intel's design efforts.

Kelleher’s presentation took place at imec’s ITF World conference, and she opened her speech by reminiscing on her own history with imec – she first worked for imec as a student nearly thirty years ago, eventually spending two years with the research giant. Intel also has a long relationship with imec spanning over the last 30 years, and that work continues today.

You might not be familiar with the Interuniversity Microelectronics Centre (imec), but it ranks among the most important companies in the world. Think of imec as a silicon Switzerland, of sorts. Imec serves as a quiet cornerstone of the industry, bringing fierce rivals like AMD, Intel, Nvidia, TSMC, and Samsung together with chip toolmakers such as ASML and Applied Materials, not to mention the critical semiconductor software design companies (EDA) like Cadence and Synopsys, among others, in a non-competitive environment. This collaboration allows the companies to work together to define the roadmap of the next generation of tools and software they will use to design and manufacture the chips that power the world.

SHARE

SHARE

TWEET

SHARE

EMAIL

Click to expand